TPS732XX – Specifications and Circuit Diagram

The TPS732 voltage regulator family employs an NMOS pass element in a voltage-follower configuration. This topology is stable when output capacitors with low equivalent series resistance (ESR) are used, and it can even be used without a capacitor. The device also has a high reverse blockage (low reverse current) and a nearly constant ground pin current across all output current values.
The TPS732 employs an advanced BiCMOS process to achieve high precision while maintaining extremely low dropout voltages and ground pin current. When not enabled, current consumption is less than 1 A, making it ideal for portable applications. The low output noise (30 VRMS with 0.1-F CNR) makes it ideal for powering VCOs. Thermal shutdown and a foldback current limit protect these devices.

The TPS732 family of low-dropout linear regulators supports input voltages as low as 1.7 V and output voltages as low as 1.2 V while sourcing up to 500 mA of load current. To achieve a dropout voltage of less than 250 mV at full load current, this linear regulator employs an NMOS pass element with an integrated 4-MHz charge pump. This one-of-a-kind architecture also allows for stable regulation across a wide range of output capacitors. The TPS732 family of devices does not require any output capacitor for stability. Because of the increased sensitivity to output capacitor value and type, this family of linear regulators is an excellent choice for powering a load where the effective capacitance is unknown.
The TPS732 family of devices also includes a noise reduction (NR) pin for further reducing output noise. The TPS73215 output noise can be as low as 12.75 VRMS when a noise reduction capacitor of 0.01 F is connected from the NR pin to GND. The low noise output of the TPS732 family makes it ideal for powering VCOs or any other noise-sensitive load.

Block Diagram

Output Noise

A precision band-gap reference is used to generate the internal reference voltage. This internal reference is the source of output noise in TPS732, and its value at the output NR is approximately 32V RMS. A low pass filter for voltage reference is created by connecting an internal resistor of 27k to the NR pin.
An external noise reduction capacitor C NR is connected between NR and the ground. When C NR is set to 10nF, the total noise is reduced by a factor of 3.2. Because the adjustable version lacks an NR pin, a feedback capacitor connected from the ground to Feedback Pin FB is used to reduce noise.

Dropout Voltage

To achieve extremely low dropout, the TPS732 employs an NMOS pass transistor. When (VIN – VOUT) is less than the dropout voltage (VDO), the NMOS pass device is in its linear operating region, and the input-to-output resistance is the NMOS pass element’s RDS(on).
To avoid degraded transient response, the TPS732 requires a larger voltage drop from VIN to VOUT for large step changes in load current. This transient dropout region’s boundary is rough twice the size of the DC dropout. (VIN – OUT) values above this line ensure a normal transient response.
Working in the transient dropout region can lengthen recovery time. The amount of time needed to recover from a load transient is determined by the magnitude of the change in load current rate, the rate of change in load current, and the available headroom (VIN to VOUT voltage drop). Under worst-case conditions [full-scale instantaneous load change with (VIN – VOUT) close to DC dropout levels], the TPS732 can return to the specified regulation accuracy in a few hundred microseconds.

Reverse Current

When the gate of the pass device is pulled low, the NMOS pass element of the TPS732 provides inherent protection against the current flow from the regulator’s output to the input. To ensure that all charge is removed from the pass element’s gate, the EN pin must be driven low before removing the input voltage. If this is not done, the pass element may be left on due to the gate’s stored charge.
After driving the EN pin low, no bias voltage is required on any pin for reverse current blocking. The current flowing out of the IN pin as a result of the voltage applied to the OUT pin is referred to as reverse current. Because of the 80-k internal resistor divider to ground, additional current will flow into the OUT pin. When VFB is more than 1 V above VIN on the TPS73201, reverse current may flow.

Even without an output capacitor, these circuits are stable.
The input voltage range is between 1.7V and 5.5V.
The dropout voltage is only 40mV.
The output current is 250mA.
These are capable of excellent load transient response with or without an output capacitor.
The NMOS topology provides a low reverse leakage current.
These produce low noise of 30V RMS at frequencies ranging from 10 to 100 kHz.
These have a 0.5 percent initial accuracy.
The overall accuracy is 1 percent due to line, load, and temperature accuracy.
These have a maximum IQ of less than one amp when turned off.
These have minimum and maximum current limit protection specified.
Thermal shutdown is also available.
These are available in fixed output versions ranging from 1.2V to 5V.
Voltages can be adjusted between 1.2V and 5.5V.
Aside from the configurations listed above, these are also available for custom output values.
There are 5-pin SOT-23, 6-pin SOT-223, and 8-pin SON packages available.
The junction temperature range is -550°C to 1500°C.
The temperature range for storage is -650C to 1500C.